Friday, August 31, 2007

My Way News - Major Computer Viruses Over 25 Years

My Way News - Major Computer Viruses Over 25 Years: "LK CLONER, 1982: Regarded as the first virus to hit personal computers worldwide, 'Elk Cloner' spread through Apple II floppy disks and displayed a poem written by its author, a ninth-grade student who was designing a practical joke."

Linux: The Really Fair Scheduler | KernelTrap

Linux: The Really Fair Scheduler | KernelTrap: "o here all the mathematical details necessary to understand what the scheduler does, so anyone can judge for himself how solid this design is. First some basics: (1) time = sum_{t}^{T}(time_{t}) (2) weight_sum = sum_{t}^{T}(weight_{t}) Time per task is calculated with: (3) time_{t} = time * weight_{t} / weight_sum This can be also written as: (4) time_{t} / weight_{t} = time / weight_sum This way we have the normalized time: (5) time_norm = time / weight_sum (6) time_norm_{t} = time_{t} / weight_{t} If every task got its share they are all same. Using time_norm one can calculate the time tasks should get based on their weight: (7) sum_{t}^{T}(time_{t}) = sum_{t}^{T}(round(time / weight_sum) * weight_{t}) This is bascially what CFS currently does and it demonstrates the basic problem it faces. It rounds the normalized time and the rounding error is also distributed to the time a task gets, so there is a difference between the time which is distributed to the tasks and the time consumed by them. On the upside the error is distributed equally to all tasks relatively to their weight (so it isn't immediately visible via top). On the downside the error itself is weighted too and so a small error can be become quite large and the higher the weight the more it contributes to the"

AMD announces 128-bit (GPU-oriented?) SSE5 extensions to x86

AMD announces 128-bit (GPU-oriented?) SSE5 extensions to x86: "EE5 also features new instructions for fused multiply-accumulate, integer multiply-accumulate, compare and test, permutation and conditional move, and precision control, rounding, and conversion. Some of these new instructions work with a new 16-bit floating-point format that SSE5 introduces. This 'half-precision' floating-point format is popular in GPUs, so this format and related instructions are likely intended for AMD's forthcoming 'Fusion' product. All told, SSE5 adds over 100 new instructions (base instructions plus variants) to the x86 ISA. No doubt AMD hopes to repeat history here—x86-64 history, not 3DNow! history—by getting Intel to eventually adopt the extensions. However, my (still fairly preliminary) reading of Intel's QuickAssist technology suggests that Intel will take a different approach to integrating many-core, GPU-style acceleration with the x86 ISA. More on this at a later time, though."

Using a hypervisor to reconcile GPL and proprietary embedded code

Using a hypervisor to reconcile GPL and proprietary embedded code: "The hypervisor can help device vendors maintain control of basic device behavior while being compliant with the GPL license, either v2 or v3. The design of such a system requires the use of different VMs to separate GPL operating systems from non-GPL components whose behavior must be guaranteed."

Thursday, August 30, 2007

Electric slide for tech industry? | Tech News on ZDNet

Electric slide for tech industry? Tech News on ZDNet: "Also under way are methods to increase server utilization, so that systems can run closer to top capacity. Turner said many customers sheepishly report their servers are only running at 17 percent capacity on average, but in fact that's better than most. "

IBM Press room - 2006-11-16 IBM BladeCenter Systems Up to 30 Percent More Energy Efficient Than Comparable HP Blades - United States

IBM Press room - 2006-11-16 IBM BladeCenter Systems Up to 30 Percent More Energy Efficient Than Comparable HP Blades - United States: "According to a 2006 report by the Robert Frances Group, across industry, the average utilization of most processors in the data center is between 15-20 percent.[3] Therefore, managing a server at its least productive state becomes critical to managing the issue of energy consumption in the datacenter"

Tuesday, August 28, 2007

Metaphor of the Branch Predict

"branch predict".

I was struck by that phrase in a meeting a few days ago. It was used by a software engineer describing what he thought the direction of a project management team would be regarding a new product. Rewording his statement: "My branch predict is that they will kill this program".

Of course, these type of metaphors are common. Body-based metaphors are the very common ("the leg of the table"). These are followed closely by metaphors using mechanical analogies arising from common occupations. These are generally used to describe one's internal thought processes and/or personal situation. I have a "sea of troubles", I'm "sailing against the wind", I've "got my nose to the grindstone", that really "fuels my fire" (its fun to think of these -- go ahead try it!).

And so you might expect our age of advanced computers to generate a number of such metaphors. It was interesting to hear this fairly hardware-bound metaphor move into the group think of the software folks..

Many enterprise codes, such as databases or ERP systems, experience lots of branches -- They are "branchy". The standard metric used in analysis is the average number of "instruction between branches". This is a measure on the dynamic instruction stream (tracking the instruction pointer) rather than based just on static analysis. For instance, running SAP SD's benchmark, R/3 executes on the average about 6 instructions before it hits a branch!

Because of the parallel nature of the way our microprocessors' internal architecture works, if we waited to branch our front end instruction decoder till all the conditional values that decide a branch were ready, we could not continue to fill the pipeline and the machine would stall. So we must predict with high accuracy which branch target is taken and start to work down that path. If we do this with high enough accuracy, then we can afford the occasional miss-predict, when we must re-steer the machine and throw away some temporary results.

To do this prediction, the hardware uses a number of heuristics. These are the "branch predict" of the hardware.

Some heuristics are clear. For instance, on x86, loops are written ending in a direct branch backward to the start of the loop. Since most loops actually loop in applications (isn't that nice), then on encountering a backward jump the first time, our best assumption is the take the branch. This is static branch prediction (Intel® 64 and IA-32 Architectures Optimization Reference Manual http://www.intel.com/design/processor/manuals/248966.pdf)

Other heuristics are more complicated to implement but, as you might imagine, attempt to remember the history of the branch. Nothing predicts the future as well as the past, or as Lord Byron (Letters/1821) said: "The best of prophets of the future is the past."

For the most part, the branch predictor in current hardware does a great job. For some floating point/numeric codes (SpecFP) the predictor can get 98%+ accuracy. SAP's R/3, which processes enterprise data from many users, the miss-predict rate is about 6%. (However, even at this rate, we lose 7-10% performance from what an oracle-type -- e.g. "perfect" -- predictor could delivery).

Using "branch predict" in the context that started this article has a certain natural simple charm. After all, its just a slightly geeky way of linking us to our hardware while saying the single word "predict". Which was what my colleague was doing here - simply predicting the future based on his best knowledge. He wanted to let the listener know he wasn't guessing about the future status of the program.

So, in these days, the Dilbert-ian static predict for a project is: "This project will be killed". Augmented with other dynamic knowledge (schedule slips, perceived value to the customer, etc.) my colleague was able to succulently state his informed opinion on the direction of the project he was describing to us.

Monday, August 27, 2007

The Dread of Threads

The Dread of Threads: " 'We get questions along the lines of, 'What could you possibly run that needs 128 cores on a laptop?,'' Patterson told HPCwire. 'This reminds me of the story of the patent examiner in 1870 who decided that everything of importance had been invented, so he quit his job to look for something permanent. Or that 640KB ought to be enough memory for PCs. We think the most exciting software has yet to be written, and it's going to be highly parallel.' "

HotHardware - More AMD G3MX Details Emerge

HotHardware - More AMD G3MX Details Emerge: "We have also received some information that Intel is headed in a similar direction with their future platforms. We’ve heard that Intel is designing an “AMB2”, which like G3MX, is a “BOB” (buffer on board) type implementation, rather than being resident on DIMM modules. We’re not clear on the timeline for AMB2 and whether it will be a discrete chip or an integral block of a future Intel core logic chipset, but we do know it is coming. "

Friday, August 24, 2007

How to Change the World: The 10/20/30 Rule of PowerPoint

How to Change the World: The 10/20/30 Rule of PowerPoint: "The ten topics that a venture capitalist cares about are: 1. Problem 2. Your solution 3. Business model 4. Underlying magic/technology 5. Marketing and sales 6. Competition 7. Team 8. Projections and milestones 9. Status and timeline 10. Summary and call to action"

Breaking News--Server Sales in Q2 Reach Heights Not Seen Since 2000

Breaking News--Server Sales in Q2 Reach Heights Not Seen Since 2000: "In terms of architecture, X86 and X64 platforms accounted for $6.9 billion in sales, up 15.5 percent compared to the second quarter of 2006, and shipments for these type of servers rose by 7.8 percent to 1.8 million units. Sales of servers based on RISC, CISC, and Itanium processors fell by 2.3 percent to $6.3 billion"

Wednesday, August 22, 2007

GigaOM Why Virtualization Is Hot: Money «

GigaOM Why Virtualization Is Hot: Money «: "Virtualization right now is at the tip of the iceberg. It is going to be complementary to solving the whole power problem. It’s a dirty secret in the industry that most data centers today run inefficiently. Virtualization makes it easier for CIOs who want to run servers at 80 or 85 percent. It’s the only way to get there"

Tuesday, August 21, 2007

Percent of you ancestor woman: 2to1 over male

See: http://tierneylab.blogs.nytimes.com/2007/08/20/is-there-anything-good-about-men-and-other-tricky-questions/index.html

why was it so rare for a hundred women to get together and build a ship and sail off to explore unknown regions, whereas men have fairly regularly done such things? But taking chances like that would be stupid, from the perspective of a biological organism seeking to reproduce. They might drown or be killed by savages or catch a disease. For women, the optimal thing to do is go along with the crowd, be nice, play it safe. The odds are good that men will come along and offer sex and you’ll be able to have babies. All that matters is choosing the best offer. We’re descended from women who played it safe.
For men, the outlook was radically different. If you go along with the crowd and play it safe, the odds are you won’t have children. Most men who ever lived did not have descendants who are alive today. Their lines were dead ends. Hence it was necessary to take chances, try new things, be creative, explore other possibilities.

How to survive climbing Mount Everest | COSMOS magazine

How to survive climbing Mount Everest COSMOS magazine: "Mount Everest rises over 8.4 km above sea level and has been ascended by over 2,000 individuals since New Zealander Edmund Hillary first reached its summit in 1953. The mountain has since then claimed the lives of more than 200 men and women."

Death/Success = 10%

IBM Unveils Information Server Blade to Help Enterprises Manage Information Overload

IBM Unveils Information Server Blade to Help Enterprises Manage Information Overload
...
The system runs on Red Hat Linux and is built on IBM BladeCenter HS21 servers with Dual-Core Intel Xeon processors. Based on low-voltage industry standard processors, the energy-efficient system also uses less power and requires less cooling than larger systems.
To ease management and enhance grid and virtualization capabilities, the Information Server Blade uses the IBM Systems Director portfolio to provide users with a centralized dashboard to discover and manage all workloads and physical and virtual machines within the pooled environment. It also provides seamless, integrated grid management with Tivoli Workload Scheduler LoadLeveler so workloads can be easily managed across blades. Tivoli Workload Scheduler LoadLeveler provides high workload throughput and efficient utilization of resources within grid clusters. New blades can be simply snapped into a grid to add more processing power as needed, and Tivoli Workload Scheduler LoadLeveler can be used to coordinate workload dispatching across multiple grids.
"As customers seek to minimize datacenter complexity and power consumption without sacrificing capacity or performance, they are turning more and more to integrated blade server solutions built on Intel Xeon processors to balance these needs," said Elliot Garbus, general manager of developer relations for the Intel Software and Solutions Group. "Together, IBM and Intel have enabled a power-friendly, highly-scalable, turn-key solution to help customers more quickly and easily modernize their information management infrastructure."

Monday, August 20, 2007

Wednesday, August 15, 2007

Justin Tumlison

Seeing as far as we can reach:
Only change necessitates a mirror; for if our appearance never altered, a single baby picture would forever tell us how we looked.

Tuesday, August 14, 2007

kaourantin.net

kaourantin.net: "As most of you hard core Flash developers know, rendering is a huge bottleneck."

AMD proposes CPU extensions for multi-core apps | InfoWorld | News | 2007-08-13 | By Paul Krill

AMD proposes CPU extensions for multi-core apps InfoWorld News 2007-08-13 By Paul Krill: "This technology will enable real-time feedback for performance optimization that can be directly used by software, said Earl Stahl, vice president of software engineering at AMD. "

Monday, August 13, 2007

Bloglines | My Feeds (3421) (1)

Bloglines | My Feeds (3421) (1): "What could PDF, Adobe's Portable Document Format, possibly have to do with this? It's a 30+ megabyte download living right now in more than a BILLION computers. Same for Flash -- a BILLION computers. That's more than 60 megabytes of Adobe code living in nearly every computer on every desktop or laptop in the world -- greater market penetration by far than even Windows enjoys. And what's IN there? Nobody outside Adobe really knows. Is there room in that 60 megabytes for the Adobe Reader, Flash, and a few hooks or applets Adobe might throw in to assist with some future product or service roll out? Sure, why not? That's the power of invisibility"

Monday, August 06, 2007

Sun releases world's fastest chip - at 1.4GHz | The Register

Sun releases world's fastest chip - at 1.4GHz The Register: "Sun has included an on-chip 10GbE NIC. In addition, you'll find eight crypto acceleration units and eight lanes of PCI Express I/O, along with four memory controllers."