Wednesday, June 23, 2004

Ars Technica: The Future of Prescott - Page 1 - (6/2004)

Ars Technica: The Future of Prescott - Page 1 - (6/2004): "IBM's POWER5 uses hyperthreading, and it certainly doesn't have the outrageous 31-stage pipeline length of Prescott. In fact, the POWER5's 16-stage pipeline isn't much longer than the Pentium M's speculated pipeline length of 12 to 14 stages. I say this only to illustrate the point that there's nothing in the lower number of pipeline stages that somehow magically makes the Pentium M a poor candidate for hyperthreading."

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